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The Design Of Double Channel Remote Sensing Data Storage And Test System

Posted on:2015-01-13Degree:MasterType:Thesis
Country:ChinaCandidate:L X DiFull Text:PDF
GTID:2252330428959039Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Under hazardous environment,status data storing and reprocessing technology whichhas the features of instantaneity, high-speed and uncertain process has been a hotspot ofresearch of missile-borne aircraft design field. This paper studies real-time storage andground test of two-way telemeasuring data, puts forward a kind of design method of doublechannel high-speed data storage and test system.The double channel remote sensing data storage and test system of this design studiesperformance testing and technology research about remote sensing data solid-state memory, itmainly explains and analyzes the design of storage and ground test bed and thecommunication protocol between them. This paper studies and discusses receiving andcached method of two-way data, hybrid coding skill and high-speed data storage technologyin the memory, analyzes technology innovation of realizing continued storage on breakpointthrough using the mode of erasing and writing meanwhile of memory. In the design, as thecentral processing unit, FPGA is responsible for all communication and transmission ofcontrol systems of all modules. Data receiving interface adopts the LVDS’s data transmissionmode. Inside FPGA, two RAM modules are built respectively as the receiving buffer. Thetwo RAM caches are interpreted circularly to realize seamless and alternate code storage oftwo-way data through data schedule module. The storage module adopts assembly lineoperation mode of crossed double plane. It uses the double chip selection signal to switchprogramming address, which can improve the writing speed of data. At the same time, it usesexpansion of depth of two chips to increase the storage capacity. In order to make stored data not be covered before the power is cut off, this paper improves the operating sequence oferasing and writing meanwhile in the memory, the function of continued storage onbreakpoint is realized when the power is turned on through the method of finding initial blockaddress at the time of initialization. In order to realize the interactive transmission of controlsignal at the time of testing, this paper designs return communication interface of controlcommands and data, which ensures the reliability of command transmitting and integrality ofreturn data. The storage module adopts separate protection measures to ensure effective andreliable data recycling.This storage and test system can realize storage of two-way high-speed data and functionof continued storage on breakpoint through the environmental stress testing, the testingperformance is stable and the system can meet the requirements of practical application.
Keywords/Search Tags:FPGA, Crossed double plane, Assembly line operation, Hybrid coding, Continuedstorage on breakpoint, LVDS
PDF Full Text Request
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