Research On The HSS Interface Software Realization And Queue Management Of A Multi-net Gateway

The persistent increase of network services is producing a higher demand for the performance of the gateway devices interconnecting diverse networks. On the other hand, Network Processor(NP) has not only excellent performance as ASIC but also higher flexibility of programming. Therefore, the gateway devices implemented by the network processor can well meet the interconneting demand of different networks. Besides, the research of congestion control is a currently a study hotspot, and applying congestion control to the gateway devices will be of great significance for preventing networks from congestion.On a basis of the project named the research on the key techniques and prototype of a multi-net gateway, this dissertation summarizes the multi-net gateway based on network processor, commercial research & development board of IXP2350 and the interface board of the gateway. Also it addresses the hardware architecture and software framework of the Network Processor Engine(NPE) within a IXP2350, and how the NPE communicates to other parts of IXP2350. Relying on the former achievement of the study group, this dissertation mainly completes the programming of High-Speed Serial Interface(HSSI) in NPE and proves that the interface can work normally by debugging. Also, it successfully accomplishes the debugging of E1 and V.35 interfaces connecting with the high-speed serial interface. It finally concentrates on the queue management and scheduling algorithm of congestion control technique, and then puts forward an improved Random Early Detection(RED) algorithm. The paper selects adaptive queue scheduling algorithm in conjunction with improved RED algorithm to realize the best performance of congestion control in the multi-net gateway.