Embedded system has a wide range of applications in many fields, including consumer,communications, industrial controller, military and other. MCU is the core of the embeddedsystem, and its performance directly affects the whole performance of the system. A MCU withbasic function based on opensource IP core is designed in this paper, it used in a miniature RFSOC chip. The core of the MCU is a microprocessor core based on the ARMv4instruction set.And it includes other peripheral equipment, just like SPI controller, universal serial, timer,universal IO port with external interrupt and interrupt controller.The microprocessor designed in this paper is based on a opensource IP core which supportARMv2a instruction set and with depth modification. ARM is the representation of the RISC,and it has a wide range of applications in embedded field. In this paper, choice the ARMinstruction set has a profound significance. The microprocessor designed in this paper has43instructions are compatible with the48instructions in ARMv4instruction set except5coprocessor instructions. It has three stage pipeline structure and Wishbone bus, and it has agood compatibility with the current compiler.Peripheral equipment is also the important part of the MCU, and microprocessor affect theperformance of the MCU, but the peripheral equipment affect the richness of MCU functions. Ithas five peripheral equipment in this paper, SPI controller and universal serial are designedindependent, and timer, universal serial with external interrupt, interrupt controller are only havethe simple functions, just used for the RF SOC chip. SPI controller conform to SPIcommunication protocol standard; Universal serial has the basic data frame structure, one startbit, eight bits data, no parity bit and two stop bits. All peripheral equipment are designed basedon Wishbone bus, they not only used in MCU designed in this paper, but also used in any otherdesign with Wishbone bus.Simulation is the important process in digital system design, it include function simulationand post-layout simulation. All parts designed in this paper have a complete simulation, the toolof the function simulation is Modelsim6.5f; Post-layout simulation is based on FPGA whichbelong to Altera’s CycloneII series. The whole design is proved work normally after the finalFPGA test. The MCU can meet the request of the RF SOC chip. |