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Improved Algorithm Of RBF Artificial Neural Networks And Its Hardware Implementation

Posted on:2014-01-30Degree:MasterType:Thesis
Country:ChinaCandidate:Y Q LiuFull Text:PDF
GTID:2248330398991059Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
In most case, the artificial neural network is implemented in software and its advantageof parallel computing can not be performed. While the problem of hardware implementationis the huge hardware resource consumption, all this severely limits the application andpopularization of the artificial neural network. For this reason, an improved RBF neuralnetwork is proposed which requires low harware resource and implemented with FPGA.Used as a basis, an multi-target image recognition applications is developed. In order topropose the algorithm, RBF(Radial Basis Function), KNN(K Nearest Neighbor) and RCEalgorithm are discussed firstly and their common can be described as follow: There are lots ofsample stored in middle layer of network, all the sample caculate the different with the featurevector which is broadcasted to the network, then the network result is obtained by taking eachdifferent value into count. Its proved that the network will converge while LMS algorithm isused to adjust the weight value between middle layer and output layer. Invalid learnning,negative example learnning and neuron exit mechanism are added to network to improve theefficiency in using of neurons. An rapid sort circuit based on bit compare is proposed to solvethe problem of sorting large number of data. AP600FPGA is used to implement the algorithmand7neurons are included in the network. The sample size of each neuron is256byte, andthe intermediate layer neurons can be expansion by bus cascading, the bandwidth of networkis15Mbit and identification cycle is17uS.In front of the hardware network access the image scan engine circuit formed the core ofthe multi-objective image recognition system and in the upper software using a combinationof recognition strategies to improve hardware efficiency. By acsessing vedio to system showthat the fastest identification rate of system is5frames/sec, recognition rate is96.5%with8neurons. Only being implemented in harware that the neuron network can play its advantagesof parallel computing and be used in pattern recognition, nonlinear modeling.
Keywords/Search Tags:Artificial neural network, FPGA, Image identification
PDF Full Text Request
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