Neural Network Hardware Implementation Based On FPGA

Neural networks which are made of very simple processing units are a computing system.The units are interconnected in one way.The system relies on the state's dynamic response of external input information to deal with the information.Neural Network is a non-linear dynamic systems.It can achieve the nonlinear relationship between the variables of the image within any accuracy , be able to solve nonlinear problems , network learning ability and system fitting ability.Therefore, the artificial neural network have had a huge impact on the field of scientific research, production and life.In this paper, the main work is to study the neural network hardware implementation problems.Neural network hardware implementation is one of the fundamental problems in the field of neural network research . Construction in the practical applications of neural network systems, it is necessary to study and resolve the issue of its hardware implementation. Dedicated hardware of Neural networks can provide high-speed and are much higher cost performance than the serial/parallel machines, therefore, the high-performance application-specific neural network hardware is dedicated to neural network research.This thesis compares the feasibility of several neural network,finally, selected BP neural network as a hardware implementation of the neural network model. As an important part of ANN, back propagation neural network (BP) is of outstanding self-organize ability, self-adapt ability, extend ability, robustness and fault tolerance, so the non-linear mapping with high precision is obtained. As one of the non-linear transfer functions in BP network, tan-s function is suitable especially on the aspects changing acutely and can accelerate the training and convergence process of the network.At present, the programmable technology develops rapidly and holds the balance on EDA design. The structure of FPGA can make full use of its parallel processing function to execute the ANN. The combination on these aspects is also pursued enthusiastically.In this paper, the STAM (Symmetric Table and Addition Method) algorithms is introduced and applied to the performance of tan-s function on the FPGA. The simulative result is also displayed later. There are several methods on the non-linear function realization. But these algorithms usually need to occupy larger hardware resource or have longer reaction times. However, the STAM algorithms can significantly reduce the requirements for the hardware resource by looking up several tables directly, and need not to execute iteratively. It can rapidly perform one time lookup results in one clock period with high precisions, where the computation error is less than one ulp. Compared to other algorithms, the STAM algorithms is more suitable for the hardware realization obviously. The reconfigurable technology based on FPGA is the use of the FPGA configuration characteristics,which allows us to make full use of the device logic resources in the same FPGA by the way through time division multiplexing. Based on this technology the reconfigurable system can be designed as flexible and easy to upgrade as microprocessor system,as fast and efficient as ASIC system .In this paper ,made BP (BackPropagation) multilayer feed-forward neural network as a typical mathematical model.Design a BP Neural networks based on the mature BP formula and used schematic design input in the FPGA.The method can be extended to more types of neural networks,provide a reliable basis for the neural network hardware implementation .