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STB Memory System Design

Posted on:2014-01-06Degree:MasterType:Thesis
Country:ChinaCandidate:H P WangFull Text:PDF
GTID:2248330398959331Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of digital TV technology and electronic products, digital TV STB (set-top box) has changed from one-way network to bilateral network, from SD (standard definition) to HD (high definition),from closed source development to open source development, and so on. These changes bring forward higher demands for hardware CPU frequency, processing speed and memory size. The use of DDR2and DDR3has become a new direction for next generation STB.The continuously improvement of electronic products has higher and higher demands for design redundancy, timing test and signal integrity. Since the transmission rate and the high speed signal test difficulty continuous to grow, simulation before design and abide by the principle of design are particularly important. In this paper, we derived the layout policy for DDR SDRAM based on the design principles for high speed signal.This paper is aimed at STB RAM design and productization. We finished this paper along the project of the design of HD STB hardware. We optimized the hardware design and testing method during the actual development of the original company. According to the latest DDR SDRAM design features, we drew testing lessons from calculation system. We innovate the DDR SDRAM design and testing methods for STB in the light of the actual situation of our company. Our innovation reduce the design verification cost and time and has higher application value.This article mainly introduces the following several aspects:1) Introduced memory basic theory and development, as well as the characteristics of various species of SDRAM/DDR/DDR2/DDR3difference focuses on the design features of the DDR2memory system. Introduced the the different DDR stability test methods and tools to use.2) Introduced the overall design parameters of the set-top terminal for STi225program set-top box power supply section and DDR part traces elaborate and specific wiring and register adjustment tool and the design method.3) Introduced the STB memory system debugging method, the advantages and disadvantages of different debugging methods to verify different PCB layout adjustment, register adjustment to the actual research and development process of debugging debugging method.
Keywords/Search Tags:STB, DDR2, STiH225, PCB layout, DDR testing
PDF Full Text Request
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