A Research And Design Of Configurable Logic Unit In FPGA

Field programmable gate array (FPGA) has been applied in many fields in recentyears. It has increasingly replaced the ASIC market, especial for the Small batchessystem, because the advantages of short cycle of research and development, low cost ofdevelopment, low risk. However, due to ownership of patents and other reasons, there isfew description of the specific FPGA circuit. This paper will make a study and designon the Configurable logic block (CLB) unit in a FPGA.Firstly, to find the optimal architecture of CLB with the0.13um technology, I usethe formula and the CAD tools to experiment. Secondly, make some improvements inthe connection blocks (CB) of the CLB to make the CB can provide logic functions,which save46%of the area of the CB in the case of achieving the same of the productterms. Then, according to the design requirements, design out all main modulecircuitries of CLB unit. And then, to verify the correctness of the design modules, Imake some circuit simulations, speed performance testings and full-chip simulations.Finally, I design out a CLB unit which has correct function and the speed performancecan compare to the VIRTEX II series chip.