A VLSI Implementation Of MQ Encoder And Its Adaptive Dispatching System For JPEG2000

JPEG2000is the next generation of digital still image compression standard published by JPEG (Joint Photographic Experts Group) in December,2000. It not only has superior compression performance over JPEG, but also has many excellent features, such as random access. At present, this algorithm has been widely used in commercial fields, but in the aerospace, military and other key fields, it is still difficult to apply JPEG2000because of its high requirements for speed and reliability. Therefore, it is essential to develop high-speed, high-reliable JPEG2000image compression chip. In the JPEG2000system, context-based adaptive binary arithmetic coding algorithm MQ becomes the processing bottleneck due to its complex operation and control. So, implementation of high-speed MQ encoder is very important in high-speed realization of the JPEG2000standard.This thesis gives a research on the MQ arithmetic coding algorithm. On the basis of previous research in the literature, the MQ encoder VLSI implementation based on three pipelined structure is designed. This structure improves the circuit’s operating frequency. It can work at134MHz in Xilinx Vertex4. In order to adapt to variable image resolution, an adaptive dispatching architecture with full feedback is proposed. To meet the high reliability demands of the space environment, three module redundancy (TMR), hamming state machine, error detection and recovery mechanisms are also used to provide high reliability. This whole design has been applied to the high-speed image compression chip based on JPEG2000...