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Research On The Key Technology Of The MPSoC Based On FPGA Platform

Posted on:2013-04-18Degree:MasterType:Thesis
Country:ChinaCandidate:L LeiFull Text:PDF
GTID:2248330395956463Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of the internet and microelectronics technology, theresearch on it’s corresponding network equipment has also made great progress. And thetwo promote each other. To achieve high network processing velocity, MPSoC (MultiProcessor System on Chip) architecture has been widely adopted in network processornowadays. However, due to various integrated hardware module, complex software orfirmware in it, the functional verification of the network processor faces greatchallenges. To shorten the verification time, FPGA-based Rapid System Prototype hasbecome an important validation process.The thesis focuses on the hardware and software system integration of the networkprocessor, and the implementation and optimization technology of the XDNP based onthe Xilinx Virtex4LX160device: by modifying the ASIC code, the XDNP design issuccessfully migrated in the FPGA; for both the performance and the Gigabit portsverification requirement, the PlanAhead tool is used to floorplan the designimplementation, which improves the timing. Ultimately the frequency is up to84MHz,increasing by24%, and the implementation time shortens by1/3meanwhile.At last, based on the hardware platform, the function verification of the XDNP iscompleted in the thesis. During the verification process, a bottom-up incrementalverification strategy is adopted: beginning with the data path verification as themodule-level, step by step, ultimately the entire system-level verification is completedin the thesis. The hardware and software co-verification method is also used: PCsoftware to generate the packets as the verification platform stimulus; ChipScope tool totest the actual internal data in the operating FPGA for debug. Such method achieves agood validation results. Ultimately the network transport function is achieved in thehardware platform. At an operating frequency of50MHz in FPGA, the results show thatthe average transfer rate among Megabit ports is523KB/s.
Keywords/Search Tags:SoC, data path, FPGA prototype, Floorplan, hardware andsoftware co-verification
PDF Full Text Request
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