TSC695is a high reliability and performance CPU, based the architecture ofSPARC V7. It is widely used in industrial control, military electronics and spaceexploration.This thesis aims at the requirement of the design of the TSC695embedded systemJTAG debugger. The total scheme is proposed. Then some research are done into thekey technologies, including the design of the communication protocol, the reliability ofthe communication, the call of the debugging tools and the replay of the debugprocedure.Next, an Integrated Development Environment (IDE for short) based Eclipse isreleased. There are menu action, auto build, launch debug session, user custom viewer,online help system and so on.At last, an extensible IDE with editor, cross compiler and remote debugger for TSC695are created. |