Side-channel Analysis And Implementation Of FPGA Based Cryptographic Algorithms

Nowadays, with the popularity and development of computer and communicationtechnology, with the construction and implementation of e-mail, electronic swing servicesystems and retail business network, more and more information is stored and transferred. Theprotection of secure information is not only limited in politics military and diplomacy but alsoclosely interfered with our daily lives, and it is aroused more and more attention. Encryptionis an effective solution to secure sensitive information. However, attackers may use the sideinformation as power consumptions, execution time and electromagnetic radiation of theequipment in the process of executing the cryptographic algorithms to retrieve the secret keys.These new kinds of methods are called side channel attacks. Side channel attacks are effectivemethods to break up the encryption devices without using theoretical methods, therefore,more and more researchers pay attention on side channel attacks and countermeasures. Thekey point of this paper is to learn how such attack works and propose an effectivecountermeasure method to fight against it.In this paper, two popular private key cryptographic algorithms: AES (AdvanceEncryption Standard) and SMS4(Chinese National Standard for Wireless LAN WAPI) havebeen implemented. The experimental results show that the proposed algorithms achived betterperformance and faster speed when ported to FPGA platform compared with softwaresolutions. The vulnerability of the implemented AES algorithm has benn evaluated by theindependently developed power analysis simulation tool. Part of the private key has beenanalyzed successfully, so the unpretected encryption algorithm cannot defend againstdifferential power analysis.Later, an improved masking method has been proposed on the condition that mostarithmetic masking cannot defend against both differential power analysis and Glitch attacks.Different architectures of masked S-box based on Boolean masking methods have beenproposed and implemented in Hardware Description Language (HDL) based on FPGAplatform. Different masked S-box architectures are applied in AES and SMS4encryption algorithms and implemented in FPGA platform. The comparison has been given to themasked AES algorithms with the existing implementations. It shows that the proposedimplementation levels up the security and achieves best throughput/area among the existingmethods.