Design Of RF Transmitter Front-end Chip Circuit In The UHF REID Reader

The paper mainly studies on the RF transmitter front-end chip circuits in the UHF RFID reader. Firstly, the RFID system, the UHF RFID system and the UHF RFID reader are introduced. Afterwards, the paper introduces the operating principle, character and development of the RF transmitter chip circuit of the UHF RFID reader. Then, the up-conversion mixer and power amplifier(PA) circuits in RF transmitter front-end chip are designed and a fully integrated UHF RFID reader RF transmitter front-end chip circuit operating from the860MHz to960MHz is proposed after reading a lot of papers about UHF RFID reader, UHF RFID reader RF transmitter front-end chip circuit, up-mixer and PA. At last, the layout of RF transmitter front-end chip circuit is designed and simulated by Cadence. The main contents are as follows:1) A new up-mixer with high gain, high linearity and low noise, which operating from the860MHz-960MHz frequency band, is presented in this paper. The main structure of the mixer is Gilbert double balanced structure, it uses complementary transconductance current injection technique that is taking current injection transistor as part of the RF transconductance. So the value of transconductance increases and switch current reduces, that can reduce noise, increase gain and improve linearity; Output matching network is composed of LC parallel network circuits, it makes little change of mixer performance in the860MHz-960MHz band by adjusting component parameters; The operation voltage of the proposed up-mixer is only1.2V; Finally, the circuit is designed and simulated by Cadence.2) A fully integrated power amplifier with high efficiency, high linearity and high power gain, which operating from the860MHz-960MHz frequency band, is presented in this paper. The circuit adopts the three-stage structure, because it is difficult to obtain the required gain with the single-stage amplification structure, the first and second amplification stages belong to AB-class, which provides large-signal drive for the output stage, the sizes of transistors gradually increase from the input stage to the output stage; Implementing a fully integrated highly efficient PA in standard CMOS is a challenge due to the low breakdown voltage, self-biased cascode technology is used to overcome it. The principle of self-biased cascode circuit is that one can adjust the gate voltage of the common-gate transistor in a certain range of changes to make sure that gate-drain voltage is not more than the breakdown voltage while the drain voltage is high; All inductors in this circuit are on-chip, so it is easy to integrated; Finally, the circuit is designed and simulated by Cadence.3) The fully integrated RF transmitter front-end chip circuit operating from the860MHz to960MHz is proposed on the basis of connecting the proposed up-mixer and power amplifier (two unit circuits are based on the differential structure and applied to860MHz-960MHz band). The operation voltage of the proposed transmitter front-end chip circuit is3V, the circuit has high output power, high efficiency and high linearity. Finally, the circuit is designed and simulated by Cadence in order to verify the reliability.