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Research And Design Of The Technology For Building The High Performance Network In Space Station

Posted on:2011-05-14Degree:MasterType:Thesis
Country:ChinaCandidate:L F ShiFull Text:PDF
GTID:2248330395462479Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Information system is the core system of Space Station, while the backbone bus is the body of information system, connecting all kinds of electric devices in it. With the rapid development of the spaceflight technology, the operations that is need to be transmitted and processed in Space Station are in high-speed growth,while the traditional spaceflight communication network system could not meet the requirement for data communication in next generation spaceflight electrical architecture. It is necessary to research and build a new spaceflight data communication network. Ethernet is the main technology in ground LAN, and International Space Station has begun to use Ethernet switch in2008, which opens the "gate" to space.Based on the application research project "Research and Implement of high performance Switch in Space Station", the building program of the switching system in Space Station is researched in this thesis, and the problem of design and realization of the switching system in Space Station is explored. A new switch network which combines kilomega switch enthernet with AFDX, a detail design method for Space Station switch and a Top-Down method to design and realize the MAC IP Core are presented in this thesis.Firstly, the bus technology used in International Space Station and several MAC technologies are introduced in this thesis. Secondly, some new high performance networking are analyzed and contrasted, the design method for the new Space Station switch network with kilomega switch enthernet and AFDX is presented. This method not only has the advantage of traditional switch enthernet, but also has the advantage of AFDX. Under the condition of the design of24-port switch, a3-level switch netwok and its detail design are introduced. Finally, the working process of sub modules designed in MAC IP Core is described, and the correctness and practicability of MAC IP Core demonstrated in this article are validated.
Keywords/Search Tags:Gigabit Ethernet, AFDX, Three-stage Clos Switching FabricMAC, Simulation
PDF Full Text Request
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