Research On MPSK Demodulation Technology For High-rate Data

Data relay satellite communication is one of the main space projects of our country in recent years, among which the high-rate data transmission technology is one of the key points, the requirement of real-time transfer data rate from the satellite to the ground is getting higher and higher. So the development of the high-rate data transmission technology has huge significance for solving the space-to-earth high speed data transmission.This article grounds on the project of an600Mbps MPSK high-speed data transmission receiver and is developed from it. It studies some key technologies of all-digital receiver for MPSK modulation and its FPGA implementation. Several subjects are discussed; including parallel receive for high-rate data matched-filtering, symbol synchronization, carrier recovery.Firstly, the whole framework of high speed digital transmission receiver is given, and it is discussed for the implement method of the framework.Secondly, the algorithm and the structure of matching filter on frequency domain are analyzed. It infers the simple structure of matching filter, also considers the relationship of speed and resource.Thirdly, the algorithm and the loop structure of symbol timing recovery are analyzed. It also gives some kinds of timing estimate algorithm to compare based on the high speed digital transmission receiver structure.Then, the algorithm of carrier recovery and blind equalizer are analyzed.Finally, High speed data receive structure, the parallel structure of matching filter the symbol synchronization loop and the carrier recovery loop is designed and realized in FPGA.