Metal Gate/high K Gate Dielectric Layer/ge Mos Capacitor

As the shrinking of MOS device geometry, there are many challenges ahead to continually enhance the performance of the device. New methods are adopted to solve these problems, such as replacing the traditional SiO2dielectric with high-κ dielectric for a lower gate leakage current, replacing the traditional poly-silicon with metal gate for the Fermi-level depinning and the degradation relief of channel carriers’mobility generated by the introduction of high-κ dielectric, introducing Ge or GaAs as the new channel material for a higher carriers’ mobility, employing multi-gate structures for stronger control of the channel, and so on. In this paper, the characterics of the HfO2/GeON/p-Ge capacitor using TiN、Al、TiN/Al/TiN as metal gate, respectively, are studied.(1) The model to correct the parasitical effect during C-V/G-V measurements is built and successfully applied in the conductance method. The parasitical resistance generated by the connection wires and the substrate and the parasitical capacitance generated by the contact between probe or base with the device cause that the directly measured results usually can not reflect the real information of the device itself. In this paper, the modles considering the parasitical effect are built up and they are applied to the characterization of interface states by the conductance method.(2) The annealing effects on TiN/HfO2/GeON/p-Ge capacitor are studied. It is found that with the super-thin GeON interfacial layer, annealing at400℃in N2for3min is an effective way to passivate the p-Ge substrate and minimize electron traps. The diffusion of intersticial oxygen from HfO2to GeON during annealing can passivate the Ge substrate and suppress the electron traps through the GeON layer, so better C-V curves and C-V hysteresis can be achieved.(3) The modulation of the gate work function on HfO2/GeON/p-Ge stacks by different metals is studied. It is found that Al with a low work function is not suitable to lower the gate work function for HfO2/GeON/p-Ge directly. After annealing at350℃in N2for10min, worse passivation of interface states and C-V hysteresis are revealed for the Al gate sample, comparing with that for the TiN gate sample. It is discovered by SIMS that Al atoms diffuse into the dielectric layer and a large amount of Ge atoms diffuse into the dielectric and Al for the Al gate sample after annealing at350℃in N2for10min, but a much less Ge atoms diffuse into the dielectric for the TiN gate sample after the same annealing. It is revealed that TiN/Al/TiN can effectively lower gate work function without degrading characteristics of the capacitor comparing with that of TiN gate. After annealing at400℃in N2for3min, the work function modulation is about0.18V, but the modulation is not effectively changed even after a longer time annealing.