Optimization And Implementation Of H.264Decoder On ARM Platform

H.264is a novel video coding standard developed jointly by ITU(International Telecommunication Union) and ISO (InternationalOrganization for Standardization). Using many advanced codingtechnologies different from the previous standards, it has much highercompression efficient and more concise expression forms than otherstandards, meanwhile provides very good video quality, which make it asthe most efficient video compression method. Currently, the optimizationand implementation of H.264encoder and decoder with the limitedon-chip memory space in embedded environment have become a hottopic in many research fields and industries.In this paper, the research on the optimization and implementation ofH.264baseline and main profile decoder is carried out on ARMplatform on the basis of understanding both the theories of H.264andthe architecture of ARM platform. Firstly, an embedded environmentwith a video play system is built on ARM platform. And then, weachieve H.264decoder system in the embedded environment.However, the enhancement in coding efficiency of H.264has been achieved at the cost of a considerable increase in computationalcomplexity, which limits its practical use in real-time system. With theanalyses of the bottleneck on the no-optimized decoder software, wesummarize the aspects that need to be optimized. According to thearchitecture of ARM platform, the H.264decoder is optimized on Ccode and assemble level for the purpose of improving data transit speedand reducing the number of instructions. Furthermore, we suppose animproved data loading solution, by which inner data transmission isachieved between different decoding modules. The speed of the decoderis again increased.Experimental results show that the optimized decoder is able toprocess H.264bitstream in CIF (176×144), QCIF (352×288) and QVGA(320×240) formats on real-time basis.