The Receiving And Acquisition System Of The Seabed Echo Signal Based On Vector Sensor

Multi-beam Parametric Sub-bottom Profiling is an important measurement equipmentof the Sub-bottom Profiling in the bottom of the ocean. And the importance of the Sub-bottomProfiling technique goes without saying, as the exploitation of the ocean resources and theextension of the coastline infrastructures. This thesis based on the scientific research projectof the seabed detection designs and debugs a signal receiving system and signal acquisitionsystem of the seabed echo signal on the basis of the vector sensor. And compiles and debugsthe logic control of the acquisition.The receiving system includes four parts, which are gain control, band-pass filtering,fixed gain and power source. In the circuit design, the important and difficult point is thelower noise design of the receiver and the channel consistency. This paper effectivelyimproves the noise characteristic of the receiver through the selection of the deceives, theinhibition of the noise source, the placement and routing of the PCB and so on; guarantees thechannel consistency of the receiver through the selection of the circuit forms and the strictscreening of the components and other measures; finally determines the parameters of thefilter through the calculation and analysis of the MFB band-pass filter circuit theories.FPGA is the core control deceive of the signal acquisition system, and this thesisdesigns the data acquisition hardware circuit based on the FPGA which mainly contains dataacquisition core control circuit, A/D transfer circuit, gain control circuit, data upload circuit,RS232interface synchronous signal receiving circuit and prepared data processing circuit. Atlast it gives a brief introduction of the precautions of the PCB board design mixed-signalcircuit.On the basis of completion of the hardware circuit, the author makes logical design toeach logical function module of the digital signal acquisition platform, and makes timingsimulation validation of each logical function. Then debugs each functional module to letthem unit and work stable under the control of the FPGA. Finally, do the pool test and theocean experiment to test the functional parameter and the stability of the system on the basisof the stable work of the whole circuit.