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A Research And Implementation For Frequency Hopping Synchronization Scheme On FPGA

Posted on:2013-09-20Degree:MasterType:Thesis
Country:ChinaCandidate:Z K ZhuFull Text:PDF
GTID:2248330371970959Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
The frequency-hopping communications has better anti-interference performance, which to ensure communication is still reliable in more interference environment, it is not only applied in military communications, but also in civilian mobile communicatio_ns; Synchronization is the key technology of the frequency hopping system, its performance has a direct impact on the pros and cons of the frequency hopping system function;so, to design a FPGA-based frequency hopping communication system has a good practical value.Design FPGA-based frequency hopping communication system based on through study frequency hopping communication technology and frequency hopping synchronization technology.First, according to the design scheme,the overall scheme of the system are given. The design including three subsystems of FH sender; the FH receiver and FH Synchronization. Using the verilog language and utilizing the modular design of the method to design each of functional module. In the design of FH send subsystem, focused on the design of DDS frequency hopping device based on m sequence; using slow frequency hopping method to achieve BPSK modulation of frequency hopping carrier. In the design of FH receiver subsystem, using a heterodyne receiver mode, with high-frequency local hopping carrier and the modulated frequency hopping carrier signal to a mixer,IF filter, to achieve solution jumping. By the IF demodulation module and the symbol decision module of the signal after solution jumping to restore the letter code. On this basis, focused on the design of FH synchronization subsystem, using the wait for self-synchronization method to design a FH capture module; utilizing the delayed phase-locked loop principle to design FH tracking module,there are the advanced sub-module, lag behind sub-module, the digitally controlled oscillator sub-module.Through the relevant computing to obtain the control voltage thus completing the synchronous tracking of the frequency hopping signal. Utilizing the Modelsim6.5a professional simulation tools to conduct a single module simulation and system simulation after the overall system design has been completed. On the basis of the simulation has successful, adopting spartan3E hardware development platform to take download test on design system, meanwhile the results of simulation and test were analyzed. Simulation and test results show that:the design system can correctly implement the DDS-based frequency hopping device, and adopt slow FH style to achieve hopping carrier BPSK modulation; based on waiting for self-synchronization capture circuit to correctly implement the hopping pattern of capture; based on delay PLL hopping tracking circuit to achieve the synchronization tracking of frequency hopping signal; heterodyne frequency hopping receiver system can correctly implement the solution jumping, demodulation and symbol decision, the right to restore the letter source.
Keywords/Search Tags:frequency hopping communications, heterodyne receiver, FPGA, capture, synchronization
PDF Full Text Request
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