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Encryption Devices Design Based On FPGA

Posted on:2013-12-04Degree:MasterType:Thesis
Country:ChinaCandidate:S N GaoFull Text:PDF
GTID:2248330371471028Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of information technology and digital society, it is an increasing awareness of the importance of information security, and how to protect computer information security has become the research focus in the IT sector. In this article, USB interface, AES encryption technology and EDA technology are combined in an FPGA, designed of a PC external data encryption device, using the SOPC hardware and software in a concerted way. In the case of the occupation of computer hardware resources, this design can achieve data encryption and decryption on a PC, which guarantees the security of the data. And the key is fixed in the FPGA chip, so we do not have to worry about the inconvenience brought by forgeting the key. This design has both high-speed FPGA itself, security and easy maintenance and flexibility of software and hot-swappable, plug and play of USB, easy to use, cost-effective.System development hardware platform is FPGA;the operating system is Microsoft Windows XP; development tools are QuartusII9.0, SOPC Builder, Nios II IDE and Microsoft Visual C++.The design is divided into two parts of the software and hardware system. The PC needs to complete the development of user applications and the FPGA needs to complete the hardware development system. Hardware includes the unit of AES algorithm, the USB controller. AES, using hardware description language Verilog, contains the encryption and decryption module, the data buffer module, control module and the key expansion module. AES can achieve the data encryption and decryption between PC and FPGA; USB controller, using SOPC hardware and software combination and containing SOPC hardware platform and NIOSII software, can achieve the communication between board and PC, and control AES module.Firstly, the background of design, FPGA development process, development environment and tools are introduced.Then, the overall system design and implementation, including the AES algorithm realization, the configuration of the hardware system and software systems programming, are all explained. Finally, introduces the host machine design, system simulation and hardware debugging.
Keywords/Search Tags:FPGA, USB2.0, AES
PDF Full Text Request
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