The Study Of Edge Node And FEC At Optical Code Label Switching Network

The optical packet switching (OPS) technology will be the trend of packet switchingnetwork which gains the common advantage of optical network and packet switching network,and avoid the flaw of circuit switch enhancing the bandwidth utilization with high capability ofdata transmit speed and ant jamming. Multi-Protocol Label Switching (MPLS) can be well usedin optical network, solve the problem of routing bottlenecks making use of label to identifyrouting information. Wavelength is usually applied to MPLS as label, but switching granularityis too large for MPLS to work as an routing identifier especially the number of users increaseresulting in packets loss and limiting data exchange in core network. So the wavelength cannotmeet the requirement of multiple granularity transmit service and efficient bandwidth allocationand statistic multiplexing. Meanwhile, the OPS has its own deficiency that data cannot beprocessed in parallel and packets cannot be overlapped in core network which restraints thethroughput of network.At first, study is based on investigation of optical packet switching, label switchingnetwork.，the structure of edge node at optical code label network is constructed with OCDMtechnology, and operating principle of each module is investigated. Optical code -divisionmultiplexing(OCDM) introduced in optical packet label switching network will be solve theseproblems, not only enhancing the bandwidth utilization and increasing the number of labels, butalso simplifying the structure of core switching network.Secondly, the design scheme for forward equivalent class (FEC) is proposed which issuitable for variable packets transmitting and enhances processing efficiency for the labelinformation can be processed in parallel in core network.Finally, the overhead between the duration of control bits and the duration of payload wasinvestigated based on the above design scheme. Mathematical analysis is employed to derivethe distribution of packet length using fixed slot algorithm (FSA) employed to assemble theincoming IP packets in the assemble queue. The simulation results and analysis were givenbetween the relations of arrival ratio/assemble slot and packets loss ratio.