Design And Test Of Digital Circuit For UHF RFID Tag

RFID (Radio Frequency Identification) is a new and emerging technology, which is a comprehensive technology involving various subjects. Such as microwave technology, materials science, computer technology and so on. Especially UHF (UHF, Ultra High Frequency) radio Frequency identification technology, with highe speed and wide reading range, is becoming more popular in the use of supply chains.This paper is mainly based on EPCglobal Class-1 Generation-2 (ISO/IEC 18000-6 Type C) standard, and introduces a baseband design for UHF RFID tag with low-power. The paper first described the development of RFID technology trends briefly, and then focuses on the composition of the RFID system, and also analysis the EPCglobal Class-1 Generation-2 protocol detailed.The key points of this paper focus on the baseband front-end circuit design, implementation, and low-power design. Front-end design described the function of the whole baseband, and detailed design of each module, including decoding, command parsing, CRC checking, command controlling, clock generation, coding, EEPROM interface and so on. The physical implementation Describes the whole process from RTL to GDSⅡ, including DC (Design Compiler) synthesis, ASTRO Placement and Routing, PT (PrimeTime) STA and a detailed DRC, LVS check with Calibre. Low-power design first introduced the principle of low-power design, and then describes the ways used in the baseband for low-power design.Finally, the design was tape out in SMIC.18 EEPROM. At the end of this paper, test environment was described. Test results showed that the tag designed has achieved all the functions required by the standard, the chip area of digital layout is 482 X 480μm2. Sensitivity at room temperature is better than-13 dBm.