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Research On Clock Synchronization Mechanism On Real-time Ethernet

Posted on:2013-11-07Degree:MasterType:Thesis
Country:ChinaCandidate:K MeiFull Text:PDF
GTID:2248330362468542Subject:Mechanical engineering
Abstract/Summary:PDF Full Text Request
Real-time Ethernet was produced for industrial control.Some importantcharacteristics of Real-time Ethernet based on Filed bus and commercial Ethernet.TheField bus for industrial control area controlled sensor、switch and so on.With thenetwork, further development of information technology,a mass of emulator anddescription had been completed by computer. The obstacle is the exchange ofinformation between filed control and R&D management. At this time a newnetwork technology was proposed to slove the above problem.This technologyenhances the work efficiency and reduces maintenance and service costs ofproduction workshop.Clock synchronization performance of Real-time ethernet is important for highprecision control and motion. IEEE1588is a master-slave synchronization protocol,clocks of the different slave nodes can be synchronized with a very high precision(below1μs). However the master is responsible for managing a lot of the exchange ofthe timing information, that the initialization speed will be very slow.In this paper several aspects concerning clock synchronization error and clocksynchronization mechanism have been analysed. A new clock synchronizationmechanism which enbles improving initialization speeds was proposed with highprecision clock synchronization. A test platform based on Altera’s FPGA chip EP3C25was developed. Test results show that the accuracy is a very high precision on100Mbps Ethernet can be guaranteed.
Keywords/Search Tags:ethernet, filed bus, clock synchronization, FPGA
PDF Full Text Request
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