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The Design Of Digital Substation Synchronization System Based On FPGA

Posted on:2014-02-15Degree:MasterType:Thesis
Country:ChinaCandidate:C ChenFull Text:PDF
GTID:2232330398976328Subject:Power system and its automation
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The traditional time synchronization or even SNTP can no longer satisfy the synchronizing accuracy demand of digital or smart substation. Referring to IEC61850standards, some applications in the process layer requires the precision level of microseconds and even sub-microseconds. By IEEE1588precision time protocol, using small amount of hardware and network resources, can meet the precision requirement of synchronization in digital substation.First, Several time synchronization ways in substation are compared systematically to illustrate the advantage of IEEE1588protocol. On the basis of IEC61850digital substation communication system, the related theories and technologies are briefly introduced. Then, this paper gives an introduction to the clock models and synchronization message of precision time protocol. At last, the synchronizing principle of IEEE1588protocol was deeply studied.According to frequently adopted networking modes, the scheme of applying IEEE1588protocol to digital substation was proposed in this paper. To avoid the influence of the latency from message processing in network protocol stack, a theory of detecting PTP message in Mil interface was brought forward. Then, A hardware architecture of synchronization system was built using a CPU, an FPGA, a PHY and a MAC. A software architecture based on IEEE1588protocol was built as well, and its flowchart was given. Through detailed analysis, the BMC algorithm was programmed in C. A PTP message detecting module with MiI interface and a frequency compensation module using Verilog HDL combining with FPGA technology were designed in this paper. Finally, the two modules were modeled and simulated in FPGA design suite. The simulation result shows the correctness of the modules.
Keywords/Search Tags:IEC61850, digital substation, time synchronization, IEEE1588, FPGA
PDF Full Text Request
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