Design Of Baseband System And Research Of Downlink Power Control Algorithm For HSDPA

As an extension of WCDMA(Wideband Code Division Multiple Access), HSDPA(High Speed Downlink Packet Access) has become a new study focus in mobile communication field. It improves the efficiency of spectrum usage a lot by adopting a series of physical layer technologies, such as AMC(Adaptive Modulation and Coding), HARQ(Hybrid Automatic Repeat Request) and so on, which makes downlink transport peak speed get as much as 14.4Mbps.Basing on WCDMA, HSDPA evolves itself step by step, so it is important to design a baseband system of HSDPA which can be both front-campitable and back-upgrade smoothly. Power resource is very important in wireless access system. It affects the interference among users and the system capacity. Based on the existing papers, both the design of the baseband system and the research of the downlink power control algorithms for HSDPA are studied in this paper. Firstly, the structure and the function of the uplink and downlink chip-rate processors and the EDMA transport and important interfaces of the DSP realizing symbol-rate process are studied. And the software architecture of the baseband of HSDPA is researched, including the HSMAC module which realizes the function of the mac-hs entity. This baseband design has already been put into actual application. Secondly, the downlink power control of HSDPA is investigated. The algorithms both based on DPCH and CQI for HS-SCCH are analysed and the corresponding formulas are provided. The methods about the HS-PDSCH's power adjustment are researched and improved. The algorithm based on code rate is proposed, which can make the power adjustment from the code rate and improve the utilizing precision of the HS-PDSCH's power. The algorithm based on BLER for HS-PDSCH's power control is brought forward in order to assure the BLER target value. The simulation results show that this algorithm can increase the system throughput effectively.