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Research Of Reconfigurable Techniques For Modular Multiplier In Galois Field

Posted on:2012-10-12Degree:MasterType:Thesis
Country:ChinaCandidate:T J YangFull Text:PDF
GTID:2218330371462564Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the extensive application of public key cryptography in information security, the flexibility of public key cryptography processor becomes more and more important. As its kernel computing unit, the performance of modular multiplier in Galois field is essential. In order to increase the speed and flexibility of modular multiplier, reconfigurable techniques of modular multiplier in prime fields, binary fields and dual field are researched in this thesis. The main works and creations are as the following:First of all, the Montgomery modular multiplication algorithm based on the Booth encoding in prime fields is improved. By using the carry-save form, the carry propagation delay shortens in the computation of partial product. The reconfigurable modular multiplier using high-radix Booth encoding is proposed with pipeline structure.Secondly, two modular multiplication algorithms are optimized in the binary fields, one is the most significant bit first modular multiplication algorithm based on the polynomial basis, which is optimized by using the word level form, another is the modular multiplication algorithm based on the type II optimized normal basis, which is optimized by using the reordered normal basis. Two reconfigurable modular multipliers are proposed based on the two optimized algorithms.Finally, the dual-field modular multiplier is improved by using the different length of words. The computation time shortens in the binary fields. The radix-(216, 264) unified modular multiplier is presented, which can be driven at same frequency in both GF(p) and GF(2m). Accomplishing the design of algorithms and hardware architecture, function simulation and verification are finished using Modelsim. Furthermore, this work is synthesized under 0.18μm CMOS technology by using Synopsys's Design Complier. The results indicate that the high-speed reconfigurable modular multipliers in this paper are advantage in speed, flexible and area comparing to other designs. These reconfigurable modular multipliers can be widely used in the design of public key cryptography processor.
Keywords/Search Tags:Pubic Key Cryptography, Galois Field, Reconfigurable Architecture, Modular Multiplication, Booth Encoding, Dual Radix
PDF Full Text Request
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