Research And Implementation Of Graphical Reconfigurable Method Based On Hardware Logic

In last30years, FPGA has been a strong and versatile device. Previously, it was used as logic device, port expansion and chip verification. Today, FPGA is used as an accelerator or a coprocessor for CPU to enhance the special performance of system.Computing with CPU and accelerator calls heterogeneous computing system. A heterogeneous computing system usually includes different accelerators faced to different task. From new century, accelerator card based on FPGA is being interested. Its fixed pin assignment to bus connection makes easy to be different roles on one FPGA. Then, a heterogeneous computing system with many accelerators could be replaced and optimized on cost and bulk.Now, most FPGAs using jumper or switch to be re-configured, it is limited by number of select. Some FPGAs are re-configured by software and it must be updated with hardware's change. This paper focuses on using a graphical interface based on hardware logic to replace jumper or switch. It will be used friendly and independently. FPGA could be reused easily in any situation, especially in computing system.