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The Research And FPGA Implementation Of VOD Accelerator

Posted on:2015-12-29Degree:MasterType:Thesis
Country:ChinaCandidate:Q CaoFull Text:PDF
GTID:2298330452964617Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of multimedia technology and improvement ofthe network bandwidth, video on command becomes a research focus. Thesize of media streaming server clusters enlarged leads to the powerconsumption increasing and the video data transmition needs largeamounts of bandwidth. To lower the power of the video stream server tomeet the requirements of green computing, and to save the bandwidth,which helps to solve the bandwidth congestion problem, a FPGA-basedVOD accelerator system is introduced. The FPGA has the advantage of lowpower, reconfiguration and easy programming. The feature of easyprogramming makes it possible to implement the prototyping system in ashort time. The FPGA reconfigurable feature makes it possible to alter theinternal structure dynamically according to application requirements, andthus the system shows an optimal performance. Compared to CPU basedserver, it costs lower power.The main contributions and innovations of this paper are as follows.First, this paper designs and implements a common hardwarevideo-on-demand accelerator. The architecture can be used to transfer filesin different kinds of formats. The architecture can satisfy the need oftransferring files in kinds of formats by the FPGA characteristics of partialreconstruction. Second, this paper designs and implements a hardwareVOD system which is based on standard HTTP protocol. It’s convenientfor users’ visit to the VOD server with browers instead of special clientsoftware. And it’s easy to use in web applications. Third, this paper designsand implements a HTTP-based dynamic file chunking method. Thismethod can effectively reduce the transmission of unneccesary data and thus save the bandwidth.Based on Xilinx Virtex6FPGA, this paper designs and implements aVOD accelerator prototype system. With A lot of coding and debugging,difficult work has been done. As a result,30percent of the FPGA resourceis used and the frequency is151MHz. The function test shows that thefunction is normal and can reply the users’ requests in short latency. Thesystem is verified in a custom board which has a10Gpbs optical interface.The performance test result shows that the highest data rate is up to5Gbpsand the power is about45W.
Keywords/Search Tags:VOD, FPGA, low power, accelerator, high performance
PDF Full Text Request
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