Low-power,multi-host Interface,multi-layer Design Of The LCD Controller

With the continuous development of digital display technology and gradually entered a mature, the growing demand for Car shows, mobile phones, digital cameras, digital learning machine and other consumer electronics products, various external forces has greatly promoted the development of liquid crystal display market., LCD controller for further brought a broad market prospect. LCD controller for LCD applications are highly integrated display controller chip, Its main role is to provide timing control signals and display data for LCD using on electronic information devices, at the same time, should have the capabilities of processing a certain graphics and image and achieving display effects. Some LCD controller also embedded in a large-capacity internal memory, better used for data cache. As the function of LCD controller increasing, the structure and composition of LCD controller get more complex, so designer and verification engineer will face greater challenges.Based on the analyses of the functional demand of LCD controller in display systems, a low-power, multi-master interface, and multi-layers LCD controller was designed and prototype verified. This paper has studied the structure of the LCD controller first, then studied the affect of power loss which in the LCD display system and proposed an effective way to reduce power consumption for display control system. In the host interface, the design of the LCD controller can match the variety of commonly used interface, increased user flexibility in host choice. the design of the LCD display can be multi-layer overlay showed, increased responsiveness of screen display, while reducing the input load of the host MCU.In this dissertation, the LCD controller is described with Verilog HDL the logic verification was performed, using ModelSim and Debussy software, and prototype verification are performed by using Xilinx Virtex2 XUP, at last, for sending to foundry to make the chip, the TSMC 0.18μm CMOS Standard Cell Library was chosen. The results from logic and prototype verification show that the LCD controller can meet the expected performance requirements.