Design And Implementation Of Alterable And High-resolution Frequency Synthesizer Based On DDS And PLL

Frequence sourse is an important component of modern electronic equipment and plays a significant role in then system performance. With the development of digital circuit and microelectronics technology, high requirement has been presented. Researchers not only have improving the quality of frequence source in mind, but also have begun to emphasize the rapid continuous change of its frequence. Rapid continuous alterable frequence source technology should be a primary trend for wireless communication and other fields.Firstly this paper introduces theory and feature of DDS and PLL, and analyses the common technique of mixed frequence synthesis, according to request of frequence source in staff room project (1~133Msps alteriable rate receive). In the design DDS(direct digital synthesizers) and PLL(phase-locked loop) were used while DDS act as the reference of the PLL. Various clock signal needed in project would be gained with PLL multiplying and dividing the frequence of reference signal. Direct Digital Synthesis has some advantages of high frequency resolutions, fast frequency swithing speed, low phase noise, the ability to switch frequencies while maintaining constant phase and the ability to producing arbitrary waveforms, but has bad spur levels at the same time. PLL has excellent character of narrowband slot, making locked frequence has the same frequence stability and spectrum purity, and has excellent performance spur reduction. This design of alterable synthesizer integrates both advantages of DDS and PLL, simultaneity restaining their disadvantages and guarantee the quality of signal. It greatly satisfies the requiment of task that realizes the rapid coutinuous variable of clock generated by frequence synthesizer with FPGA technology, and achieves coutinuous change of signal frequence of the synthesizer when guaranteed the quality of signal.