Implementation Of Motion Search And Integer Transform-Quantization In MPEG-2 To AVS Transcoder On FPGA

Recent years,with the development of digital communication technology, the requirements of processing multimedia video image information become higher. The video image has large information data, needs high demands of communications equipment and information storage devices. Many video compression standards are issued to compress video image, such as MPEG-2,MPEG-4,H.264 and so on. Our country also issued AVS standard with independent intellectual property rights.MPEG-2 is the first generation video compress standard and is rich in program resources. Now, MPEG-2 is widely used in the field of digital broadcast television. H.264 and AVS all belong to the second generation video compress standard. The transcoding efficiency is about 2 to 3 times for MPEG-2. Although the AVS standard originated in the H.264 standard, but the AVS uses many new technologies which effectively avoid the patents of H.264. Compared with the H.264, the AVS significantly reduces implementation complexity when achieve the same performance in video compression. The AVS has bright future driven hardly by our country.In terms of just be issued for short time, AVS is poor in program resources. If the MPEG-2 program can be transcoded to the AVS program, the promotion of AVS standard will be advanced. It's hard to guarantee real-time video coding or transcoding if we adopt just software to realize. The FPGA can solve the problem with sub modules' parallel processing technology which has the advantages of low cost in large-scale production.In this paper,MPEG-2 standard and AVS standard are contrasted. According to the differences, a transcoding strategy is proposed. On basis of traditional pixel caseade transcoding framework, an improved fast pixel caseade transcoding framework is used. Some parts of the transcoder has accomplished hardware design and implementation. This dissertation uses verilog programming language to program and Modelsim to simulate. ISE integrated environment is adopted to synthesize and implement. The entire transcode and sub module designed in this paper all be verified on XILINX virtex-5 series chip. The verification results show that the design supports 1920×1088,30fps real-time HD video transcoding.In the process of study and implenment, the specific works are done as follows:(1)Do deep study in MPEG-2 and AVS, introduce the key technologies of the two standards and compare the differences of them.(2)In terms of the differences between the two standards,determine the transcoding framwork and the strategy of using MPEG-2 informations.(3)Reuse macroblock motion informations of MPEG-2 to do macroblock motion search in transcoding port.Design and realize motion search module and motion vector predition module.(4) Transform,quantization,inverse quantization,inverse transform and scan are designed in the whole in AVS coding port. The design operates on macro block level and provides high parallelization. The sub modules are all simulation and verified.