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Based On SOPC Decimal Floating Point Multiply Unit Design And Implementation

Posted on:2012-11-14Degree:MasterType:Thesis
Country:ChinaCandidate:Z X TangFull Text:PDF
GTID:2218330338455882Subject:Computer technology
Abstract/Summary:PDF Full Text Request
Traditional data processing by computer are binary limited by the principles of computer. Data input, output, storage display and even operation are need repeated binary conversion. With the development of data-intensive computing and the need of distributed computing, massive data with decimal processing are more widely application. Independent of the decimal floating point multiplication unit has become increasingly important in these areas recent years.In this paper, we will descibe a decimal floating-point multiplier unit based on SOPC technology with standard IEEE-754r. The new IEEE-754r standard combines IEEE 854 standard and IEEE 754 standard, it revises in the floating-point format as follows:joined the 16-bit and 128-bit binary floating-point format, and decimal floating point format. As the new standard decimal floating point multiplication revision and application broadly, This model design is practical significance in the banking, financial, biomedical, medical, astronomy, geography, data acquisition and image compression and other professional fields. The multiplier model uses Signed-Digit radix-4 algorithm, which is the latest series of Signed-Digit radix parallel algorithm, Combined with a new BCD encoded to decompose the decimal floating-point. Signed-Digit radix-4 algorithm compares with the conventional floating point multiplication algorithm; it is fast reduction of the partial product of two operands.In this paper, we uses the SOPC technology in the EDA technology system, design and Implementation of a 64-bit decimal floating-point multiplication unit on experimental platform with SOPC. It research ideas and methods that is the design and implementation of SOPC-based decimal floating point multiplication unit. With flexibility, low power and micro encapsulation in SOPC technology, this model is packaged as an independent IP core. Provide the test platform with soft-core embedded CPU to validate, and to ensure the system's portability. SOPC is scalable, extensible, scalable, and the function of software and hardware in-system programmable, particularly suitable for mass data processing. It is demanding real-time data processing with good parallelism and scalability.SOPC-based decimal floating-point multiplication unit compare to traditional binary floating-point unit, it is wider range of operation, higher accuracy, applications abroadly and so on. Most of processing data is decimal data in life, decimal data dealing with need repeated conversion between decimal and binary in ordinary processor, it is wasted a lot of time. Therefore, it is a certain practical significance in massive decimal data processing, as well as higher real-time occasion.
Keywords/Search Tags:Decimal floating point multiplication, SOPC, FPGA, NiosⅡ, Signed-Digit radix-4
PDF Full Text Request
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