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Accelerate Eda Algorithm Based On Multi-core Processors In Parallel

Posted on:2012-08-30Degree:MasterType:Thesis
Country:ChinaCandidate:X M YeFull Text:PDF
GTID:2218330335497822Subject:Microelectronics and Solid State Electronics
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With the continuous development of IC technology and computer architecture, the trend of processor development has been turned to multi-core while the single-core processor has been limited in frequency by power and heat. Multi-core processor means integrating several complete computing cores on one chip. There are several kinds of typical multi-core processors:general CPU, general GPU and Cell BE. Different kinds of multi-core processors have been used in different applications, such as general CPU used in system task scheduler or multi-thread for its independent multi cores, general GPU used in data-intensive science computing for its optimized floating point operation unit and large scale parallel cores, Cell BE used in servers.At the meantime, EDA technology is also developing. The data-intensive computing parts in EDA algorithms lead to long runtime, which brings bad news for designers who need fast designing. Single-core processor based EDA algorithms can't be improved in runtime because of the frequency limit. Multi-core based parallel EDA algorithms have to be developed to adapt more and more widely used multi-core processor architecture to get improved on runtime and accelerated.In this thesis, we will focus on the architecture and programming model of the multi-core processors facing the data-intensive science computing. We have proposed a serial-parallel synergistic architecture composed by general CPU and GPU. On this architecture, we will parallel the "Hot Spots" in the EDA algorithms in order to accelerate them.Statistical Static Timing Analysis is a typical data-intensive EDA algorithm. Traditional Monte-Carlo based SSTA has very long runtime for its huge number of configurations. In this thesis, we generate stochastic configurations based on sparse grid so that the number of configuration has been greatly reduced. Then we parallel the sparse-grid based SSTA on GPU and gain 320 X speedup.For the multiplication of a fixed-point input by multiple sets of fixed-point constants in linear transformation, a novel approach of reconfigurable multiple-constant multiplication algorithm has been proposed. The algorithm generates reconfigurable multiple-constant multiplication in two strategies, which are local and global optimizations, and selects the better as the output. The experiment result synthesized by 0.13μm technology shows that the multiplication generated by the proposed algorithm has much advantage on area cost and can be used in the application of linear transformation with several different coefficient-sets.We analysis the data-intensive part of RMCM algorithm and parallelize it on GPU and gain some speedup.
Keywords/Search Tags:Multi-Core Processor, EDA technology, Graphics Processing Unit, Statistical Static Timing Analysis, Reconfigurable Multiple Constant Multiplication
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