Pldro Study, Based On Sampling The X-band Lock-in Technique

Microwave frequency generator is one of the most important parts in wireless communication systems. Continuous development of semiconductor device and manufacture technology leads to a persisting demand for miniaturization and performance enhancement of microwave circuits. Considering the high Q value of dielectric resonator (DR) and excellent nearby phase noise of a phase-locked loop, the integration of voltage-tuned dielectric resonator oscillator (VTDRO) and sampling phase-locked loop is an attractive solution for fixed frequency generator in that we can combine the advantages of both of them.In this thesis, a 12 GHz sampling phase-locked dielectric resonator oscillator (PLDRO) is designed and fabricated. Firstly, the basic theory of oscillator and sampling phase-locked loop is introduced. DRO design is divided into oscillating simulation, which is achieved by small signal S-parameter simulation in ADS, and frequency selection. Sampling phase-detecting function is realized by a commercial chip (MP7200). A 100 MHz power amplifier is integrated at the reference input, which releases the demanding of high reference input power. Besides, in order to guarantee a more stable performance, a sweeping circuit is integrated with active loop filter by sharing the same operational amplifier.Finally, the output power of the 12 GHz PLDRO is -3.82dBm after two-stage cascaded resistive power divider network (6~7dB attenuation each stage). Phase noise is measured to be -100.89dBc/Hz, -109.33dBc/Hz, -112.19dBc/Hz and -138.53dBc/Hz at 1 kHz, 10 kHz, 100 kHz and 1 MHz carrier offset separately. Spurs suppression is better than 80dBc over 2 GHz span. The whole circuit is integrated in a 85mm×52mm×13mm metallic box. The requirement of miniaturization and high performance is achieved.