.90 Nm Logic Products Peeling Defects Solutions

With computers and other home electronics products continuous advancement and technology upgrading, our life has entered the electronic age. At the same time we are experiencing a new technological revolution, and the driving force of the technological revolution lies in the semiconductor industry's constant innovation. And the promotion of innovation depends on the semiconductor design and manufacturing process expanding all the time.At present, the international semiconductor manufacturing process has entered the nanotechnology era. And some world-class manufacturer has entered 45nm substantial volume production. Last year, SMIC brought in the 45nm process technology of IBM. And it will be produced at the end of this year probably. At present, in china, 90nm and 65nm technologies are most advanced. And the 90nm technology is the most mature. As we know, with semiconductor entering to sub-micron era from micron, then nanometer era, the wafer size become 200mm from 150mm, then 300mm now. In this thesis, we focus is the defect which is found on 90nm logic process at 300mm wafer.Lithography process through exposure methods make the pattern of mask transfer to the surface of silicon with resist, through coating, developing, etching and other processes. Lithography process directly determines the final CD, which is the key to large-scale integrated circuits manufacturing technology. In addition, the lithography process has other one significant role, which it is the basis of ion implantation. It is used as ion implantation barrier. The quality of lithography process usually decides the final outcome of the integrated circuit.Lithography technology is one of the most important processes in the integrated circuit Processing. It is the foundation of etching and ion implantation. The quality of lithography process often determines the final result of integrated circuits.Lithography to do is opening window for the etching and ion implantation. In this window region, or etching or ion implantation, implant impurity that we need, make the devices and interconnects that we need. Lithography process has two key: (1) Aim to meet the required size of the window (2) Minimize process defects. First, do not say more for the first point, this is the soul of lithography, but also is the basis of other process. The second point is equally important, however, especially in the commercial production of integrated circuits industry, because it tends to affect the final chip yield, and yield of the product high or low is the key that the product if has price advantage. And it is one of key consideration parameters that one fab processes Whether or not the credibilityThis thesis is to give solution that aims at the peeling defect issue that come out in 12-inch 90-nanometer logic product(mainly ion implantation layer).And for Satellite defect give the solution that come out in the course of solving the peeling defect. At last, solve this problem completely to prevent the resulting lower yield problem.