Bm Algorithm-based Rs Decoder Ip Core Design

Reed Solomon code is one of the most widely used forward error correction block codes, and is capable of detecting and correcting mulfiple errors particularly focusing on burst errors. The main purpose of this paper is to design a versatile RS decoder with a high-speed and area-effecient architecuture based on FPGA chips.In recent years, riBM algorithm has become the most popular solution to implement RS decoder, due to its extremely regular structure, short critical path delay and high throughput. However, a large number of multipliers and adders are required in Key-Equation-Solver (KES) block, and this block has to stay idle for most of the time when riBM algorithm is used to a variety of particular applications. That means high resource consumption and low resource utilization efficiency.In this paper, an improved version of riBM algorithm is proposed. Our method, using t+1 folded systolic architecture, achieves highest throughput and resource utilization efficiency without degrading performance on critical path delay. More interestingly, on the basis of our decoding architecture, further complexity benefit can be realized by sharing hardware units among sub-blocks, which has long been neglected in previous research. Two architectures using this sharing technique are given in the paper and are proved to reduce the hardware complexity dramatically.The decoder presented in this paper is able to support multiple RS code standards, including shortened code, punctured code and erasure decoding. A self-checking mechanism is also provided in our decoders, which is used to indicate a failure of decoding a codeword when an excess of errors has occurred.Both M-language and VHDL implementation of the architectures proposed have been tested and verified for a noisy channel, and corresponding simulation results are given as well. Results in terms of logic element, throughput and latency show a competitive advantage when compared to existing IP core. All the VHDL code has been integrated into a user-friendly GUI written by VC++. This interface allows the user to define a number of parameters, and thereby offering wide versatility.