Rs And Ldpc Error Correction Code And Its Cascade

The issue stems from cooperation projects with the institute and the aim is to fulfill error correcting in wireless communication system. The main problem in modern communication system is how to conquer disturbances and to reduce the transmission error when random noise exists.RS (Reed-Solomon) code is one of error codes which can correct burst error and randon error. It is widely used in many sysmterms, such as DVB, communication, army and so on.LDPC (Low Density Parity Check Code) code is one of very density check codes. Its design, constitution, decoded, fast coded and performance analysis are widely interested and studied now.Firstly, this paper did some detailed studies about RS code, and fulfilled a RS(31,15) code and decode system based on AHA4012B of AHA company's application specific integrated circuit, which controlled by Altera's low cost series FPGA(Field Programmable Gate Array). The RS(31,15) is usually used in battlefield.Then it studied the constitution,encode and decode method of LDPC, gave out the circuits design of the encode of LDPC(36,24), and gave out the decode of it with the hard decision method which has low complexity. All the design were completed in FPGA. In order to reduce the complexity of matrix operation in encode and decode, this paper designed a circuit of cycle shift sum. This circuit also reduced the storage space in LDPC encode and decode.At last, this paper carried out a kind of concatenated code by three collateral RS(31,15) codes and 31 collateral LDPC(36,24) codes, and analysised the performance of it. This collateral method has good error correct performance and low complexity. It was proved that the performance of the concatenated code is better than RS code and it is suitable for this communication system.