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C-band Low Phase Noise Frequency-hopping Source Developed

Posted on:2009-08-13Degree:MasterType:Thesis
Country:ChinaCandidate:J LiFull Text:PDF
GTID:2208360245961472Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Today,as the electronic technology is developing fantasticly fast,the request for higher performance of synthesizers is put forward,especially the low phase noise performsnce.As the PLL is the main force of modern synthesizer,do a forwad research in technology of low phase noise design is very necessary.For this reason,the paper is mainly focus on the theory and technology of low phase noise PLL design.This article introduces a scheme which makes C-band low phase noise hopping frequency synthesizer come true, with PLL and mixer. Some innovative ideas of low phase noise design about PLL is presented in this paper.At first,the developing history and actuality of the frequency synthesis technology is reviewed.and,PLL frequency synthesis basic technology is introduced. Following,the phase noise and spurs of caculating model is deduced and frequency synthesizer models in common use is aslo particularly introdued.Based on the phase noise caculating model the close-to-carrier phase noise math expression of dual-loop PLL synthesizer is obtained. Finally, the keys of engineering-oriented realization of such modules as loop filters,dual-VCO and frequency detectors are discussed .some questions which must be paid much attention in the system design, and a innovative PFD lock detector circuit is presented in this paper.At last,a C-band low phase noise and low spurs PLL designs are to be presented by me to verify the theroies of low phase noise and low spurs design .All in a word,this article provide some meaningfull instruction for low phase noise and low noise hopping frequency PLL design.
Keywords/Search Tags:phase noise, Supr Reduction, hopping frequency synthesizer PFD lock detector circuit, C-band
PDF Full Text Request
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