Design And Realization Of Passive Radar Signal Processor Based On If Diital Receiver Dear

It is urgent to improve the performance of radar because of the complexity ofmodern battlefield. Funcition of signal processor becomes more and more important inthe design of modern radar.Hardware platform technologies have also brought greatchanges.Application of digital receiver becomes more and more universal because of itswide dynamic range,high resolution,high capability of anti-jamming and flexibility.The research was done on the background of one passive radar seeker.Parallelprocessing system which is easy to be realized and based on intermediate frequency(IF)digital receiver was given in this paper,which is based on the research and analysis ofbasic theory and realization of software radio.Considering each specialty and dominance of FPGA and DSP device,each functionto be realized has been organically combined and rationally planned incourse of designof signal processor system.AD9251(14bits&80MHZ) which belongs to ADC chip isused to sample IF signal(60MHZ) in this signal processor.The digital signal sampled isprocessed based on Digital Down Conversion(DDC) in FPGA.Function like asmu;ti-channel phase measure is realized using CORDIC algorithm and rotationmode.Function such as signal sorting,target tracking and information returning isrealized in DSP.Selection,design and test for device of hardware circuit detailed in this paper.Design of high-speed circuit and test flow of hardware in course of hardwaredevelopment is also summarized combined the work experience.Development of the engineering prototype of signal processor has been finished atpresent. High-speed and high-precision AD and high performance FPGA used in thisprototype. The prototype can finish AD sampling of IF signal through8channels. Itprocesses signal on DDC and finishes phase measure in real time. It proves that theprototype has high precision in phase measure of pulse edge. The phase difference ofevery channel is less than0.5degree.Process speed of pulses in one second is morethan20000through the optimization of software flow and realization.The prototype has been applicated successfully in the radar products and finished some tests,such as environment test,hardware-in-loop simulation(HILS),and so on.Theresult of system tests is satisfied with the demands. It proves that the processor hascompact structure,stable performance and all the indices achieved the design demandsscheduled. It has some application values because that it can also be used in otherpassive radar seeker.