.8 Psk Signal Code Synchronization Algorithm And Structure

The signal of 8PSK is a kind of m-ary phase-shift keying, which has effective utilization rate of band. Because of the better performance of the coherent demodulation compared with the incoherent demodulation, the first one was chose. But the traditional coherent demodulation needs two different quadrature carriers, which increases the difficulty of the implementation of circuit. Thus a new demodulation algorithm which needs one quadrature carrier is presented in this paper.The timing recovery is one of the crucial technologies and difficult points in digital communication, and the performance of the symbol synchronous has a great impact on the system of the demodulator. After thoroughly study the related knowledge of the timing recovery, analysis about the common timing recovery in the communication was made, then upon this basis, the phase-locked method of the self-synchronization recovery was analyzed, one scheme having good performance, which was the timing recovery based on interpolation called the algorithm of GARDNER.The arithmetic design in MATLAB as well as the simulation and the analysis were discussed. Secondly, the filter method of the self-synchronization was introduced. Five different kinds of non-linear algorithms were analyzed, designed and simulated, the results were also shown and analyzed, then a kind of algorithm which had a relatively good performance and was suitable for high-speed parallel structures was chose for the high-speed parallel demodulator. At last, according to filter characteristics and signal processing theory, after thoroughly study about the structure of high-speed parallel demodulator, the structure was improved. The program of the system was validated by simulation results.The primary work in this dissertation was as follows: first, a kind of coherent demodulation algorithm was presented. Second, two kinds of the timing recovery were analyzed, and meanwhile the design of the arithmetic of the timing recovery was complemented. Third, the modification of the parallel architecture was made. Last, the soft simulation was carried out and the result was analyzed.