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Design And Implementation Of Synchronization Module For Parallel Pilot Baseband Receiver Of LEO Satellite

Posted on:2022-10-15Degree:MasterType:Thesis
Country:ChinaCandidate:D S FanFull Text:PDF
GTID:2518306551480734Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
Perfect information network system has gradually become the cornerstone of a national economy and national defense construction,and the establishment of safe,efficient and high performance information network system has become a strategic goal of all countries in the world.Low earth orbit satellite communication has become a hot spot in the development of information network systems in various countries around the world due to its advantages of low latency,high bandwidth,and wide coverage.As for low earth orbit satellite communication,signal synchronization is very basic and critical.The synchronization mainly includes two aspects: symbol synchronization and carrier synchronization.This thesis focuses on the research work of these two aspects.First of all,on the basis of summarizing the related theories and methods of symbol synchronization such as inserted pilot method and carrier synchronization such as Fitz method,according to the actual situation of the project,the paper chooses the interpolated closed-loop Gardner symbol synchronization method and FFT estimation method to achieve low Symbol synchronization and carrier synchronization functions in orbiting satellite communications.In terms of symbol synchronization,the basic principle of Gardner's method and the composition of Gardner loop are studied,and the symbol synchronization module of low earth orbit satellite communication is designed in principle by this method.In the MATLAB software environment,based on the principle of minimum bit error rate,through simulation,the bandwidth of the synchronization loop is optimized to be 10 Hz,and the loop is configured.In terms of carrier synchronization,the basic working principle of FFT frequency offset estimation and phase offset estimation is discussed,and the basic structure and schematic circuit design of carrier synchronization module based on this estimation method are explored.Among them,the long information sequence is used skillfully and flexibly to estimate the phase bias,and the results in the decreasing of the bit error rate effectively.In the MATLAB software environment,based on the principle of minimum bit error rate,through simulation,an information sequence with a length of 4096 points' FFT operation is optimized,and the optimal data segment length of the phase offset estimation is 636,and the phase correlator with the length of 636 effectively reduces the demodulation threshold by 0.5d B.Then,on the basis of the above-mentioned research,based on the Gardner symbol synchronization method,FFT estimation method and its schematic circuit design,the symbol synchronization and carrier synchronization modules for low earth orbit satellite communications were implemented on the FPGA of Kintex-7 series with the style of XC7K325tffg676-2.In order to meet the overall accuracy requirements of this project,the signal width of the synchronization module is set to 18 bits.Finally,the symbol synchronization module consumes 711 look-up-tables,319 SLICE resources,and 6 DSP resources of the FPGA.The carrier synchronization module consumes 11100 look-up-table resources,24 DSP resources,9.5 BRAM resources and 3387 SLICE resources of the FPGA.After implementation,Model Sim software is used to perform logic verification on the symbol synchronization and carrier synchronization modules.Comprehensive use of MATLAB integrated development environment,we carried out systematical experimented on the overall function formed by the two synchronization modules realized by FPGA.In MATLAB integrated development environment,the analysis and processing of all communication modules such as modulation and demodulation except the synchronization module implemented by FPGA are performed,and the statistics of the bit error rate are also completed.The style of the FPGA on TLK7-EVM development board is XC7K325tffg676-2.The development board is utilized as a semi-physical verification system platform.In the experiment,the different powers of the parallel pilots are used,and the performance of the synchronization module is reflected by the bit error rate of the communication system link.The experimental results show that the synchronization module designed and implemented in this paper can effectively and reliably realize the synchronization function and meet the requirements of low earth orbit satellite communication.In addition,when the pilot energy is 12 d B less than the useful signal,the performance of the overall communication system can be improved by about 0.5d B.
Keywords/Search Tags:Low earth orbit satellite, Symbol synchronization, Carrier synchronization, Gardner, FFT frequency offset estimation
PDF Full Text Request
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