Fraction Of The Wideband Digital Array Radar Delay Measurement And Technology Research,

Digital Array Radar(DAR) is a fully digitized phased array radar in which digital beamforming techniques is used both in receiving and transmitting. In order to improve the accuracy of digital beamforming, the problems of how to accurately measure and compensate the channel delay in the broadband DAR are yet to be resolved. This dissertation is to address the problems of fractional delay measurement and implementation methods. The main work can be summarized as follows:1. The delay measurements of broadband LFM signal are researched. Minimal delay among channels of digital phased array radar is produced due to channel difference. Broadband LFM signal delay is measured by the methods of frequency beat, correlation and adaptive. Simulation results show that frequency beat method can approximately measure integer delay and decimal delay, the correlation method can precisely measure integer delay but fractional delay, while there is biggish error using adaptive method. As a result, frequency beat method can be used to measure the small delay of broadband LFM signal.2. The methods of fractional delay are researched, including characteristics, advantages and disadvantages of the basic fractional delay methods and their implementation. The design methods of existing fractional delay filters are analyzed and summarized. The design methods, performance, complexity of hardware implementation and stability of FIR and IIR fractional delay filter are analyzed and compared in this dissertation.3.An optimization algorithm of fractional delay filter for beamforming in phased array radar is researched. A multi-rate processing method is used to achieve fractional delay, using weighted least squares (WLS) approximation optimization in frequency domain for its branch filters. With the existing methods of comparison, the main advantage of this optimization algorithm is that the range of frequency-domain optimization is small, which can greatly reduce the computing time, the order of the filter and the computation. The tedious weighted coefficient calculation can be avoided at the cost of increasing a dozen of orders of HBF. Once the passband and ripple are determined, we only need to import the delay data to achieve variable delay, which is easy for the FPGA hardware implementation. MATLAB simulation is done.4. The implementation of FPGA-based fractional delay is researched. This study is about the key technologies of using FPGA to implement digital delay, related to the coefficient processing and error analysis, distributed algorithm and pipeline technology. Then the fractional delay filter is implemented by means of FPGA IP core.