Processing And Transmission System Of Micro Uav Image Design

In warfare, it is the key to win that offering the accurate and opportune intelligence to commanders and soldiers. Recently, as a new kind of equipment, MAVs (Micro Aerial Vehicles) shows its outstanding capability and takes an important part in wars. Now Army of many countries lay emphasis on USH and study in this field deeply.Fist, we introduce MAVS' s development in domestic an abroad. Subsequently we analyse theframework of the system, then expound the theory of designing and propose the designed project.This context first puts forward the whole structure and design method of the system, then, make sure the project of the image digitize and compress, analyses some basic theories that the system has involved, after that, introduces the method of the alarm image's transport--RF.Complete the hardware design of the system. Video gather part include video input and output, the design adopt the integrated video chip SAA7111 A to realize the signal conversion of analog video input signal, it adopt the IZC bus as programming interface of the device. Under the help of CPLD, the system use SAA7111A to digitize the image and compressing it by ZR36060.The TRF6903 single-chip solution is an integrated circuit intended for use as a low-cost multiband FSK or OOK transceiver to establish a frequency-programmable, half-duplex, bidirectional RF link. The multichannel transceiver is intended for digital (FSK, OOK) modulated applications in the North American and European 315-MHz, 433-MHz, 868-MHz, and 915-MHz ISM bands. The single-chip transceiver operates down to 2.2 V and is designed for low power consumption. The synthesizer has a typical channel spacing of better than 200 kHz and features a fully-integrated VCO. Only the PLL loop filter is externalto the device. Two fully-programmable operation modes, ModeO and Model, allow extremely fast switching between two preprogrammed settings without reprogramming the device.At last, according to the application backround and the capability requirements, each subsystem' s configuration and working principle is analysde, and the hardware is realized.