The Design In Compressing And Coding Of Video Image By FPGA Based On DVI Interface

1. Significance of studyWith the development of multimedia communication , the videocommunication system,is playing an important role in our daily life. Because ofthe difficulty in saving and delivering huge numerical video information,therequest that the compression and coding technique of video delivered in the processis put forward to. The development of computer and networks technique bringsalong improvement in the arithmetic of numerical video compression and thestructure of video processor availably in 21 centuries. At the same time variousmulti-media technical realization also promoted the fusion of the communicationand computer. The video compression and its signal processing has been a difficultand core problem of the multi-media technique that to be solved. The method that itsolves decides the scope and efficiency of multi-media technique which applied.The development of video compression is a key in multimedia communicationrealm.The international telecommunication alliance,MPEG and other internationalorganization draw up the compression standard of much important multi-mediadata in 90's. JPEG,H.263,MPEG-1,MPEG-2 and some other multi-mediaagreement standard is applied successfully in multi-media meeting,teaching,communication,supervision and various situations such as VCD,DVD etc. TheDivx,H.264, MPEG-4,MPEG-7 are the new generation of multi-media standard.The coding and decoding machine also gets the more extensive application withmuch more outstanding function and efficiency.2. Universal project and realization of each function molds of systemThis research work is divided into two parts:(1) Pick up video data from the output of digital visual interface in displaycard.The DVI that the technique according to the T.M.D.S(Transition MinimizedDifferential Signal) communication agreement of Silicon Image company providesa high-speed chain to connect the way for delivering the video data in time. It ismainly used for the conjunction between computer and the display equipments. Itcan lower the manufacturing cost of the host display system and the displayequipments synchronously. Any existing numerical flat panel displaytechnique(such as LCD, LED,and OLED etc.) all can use the DVI as signalinterface. The DVI network structure not only can support the display equipmentsof the extremely high distinguish rate,but also can connect the display equipmentswith simulation interface.The DVI is a kind of video interface that not only can be used to the existingoperate system and hardware terrace but also be followed by the interface standardpreviously. Figure 1 is the T.M.D.S logic network structure of the DVI. The DVIsupports plug-and-play function. When the system start,the DVI provides thelowest distinguish rate of VGA 640 ×480 modes.(2) Choose coding method for the video compression that is suitable forFPGA to realize. Compress and code the output's data from DVI.The reason that numerical picture can be compressed is that original picturedata is highly related first,existing the big redundancy degree in information,andresulting in wasting of the bit rate. Remove these redundancies can economize thecode word and attain the purpose of compressing data. Main performance of theFigure1 T.M.D.S logic network structure of the DVIClock PathPath0Path1Path2T.M.D.S Signal Receiver Clock EnableT.M.D.S Signal Generator Signal T.M.D.S chain pathInput FormatPixel Data 24bitControlData 6bitInput Interface Layer Data EnablePixel Data 24bitControlData 6bitInput FormatClock EnableOutput Interface Layerredundancy of the picture is followed by these aspects: Space redundancy: In apicture,the scenery will not change suddenly,so the close pixel has the very bigacquaintanceship,being called the space redundancy. It can be done away with theDCT transformation method. Time redundancy: The close frame has the verystrong relativity in the sequence pictures. It reflects as time redundancy. We canuse moving estimate and sport compensates to wait to do away with theredundancy. Information entropy redundancy: The information entropy is thenumber according to take of amount of information is higher than the informationentropy. It can adopt the coding of Huffman,arithmetic and some other methods todo away with the redundancy. Sense of vision redundancy: The mankind's visualsystem is not equality and linear for the pictures. It is much more sensitive for theerror of the slow district than the violent district. It is the reason that the high hassome redundancy. We can adopt the method that fine quantity of low to do awaywith not redundancy in high that not impressionable for person's eye.It is used the H.263 suggestion as the foundation,to put forward the suitablecompression for hardware. Figure2 is the universal project that is suitable forFPGA realization.The system mainly includes: video format conversion mold,disperse cosinetransformation(DCT) and its inverse transformation( IDCT) mold ,quantity andimageformatconversionstoragemotion estimate DCT quantitymotion compensate IDCT inversequantitysystem commandEntropy coding and bit rate compoundingFigure2 the universal project in compressing and coding of videothe inverse quantity mold,compounding the code rate mold and controlling thecode rate mold. We use the Verilog-HDL to describe each hardware mold,anddownload it to the FPGA machine which is manufactured by the company of Alteraat last. This is the most important and the biggest workload part of this paper.3. ConclusionsThe compression and coding technique of video is hotspot in research ofcommunication. We launch the research on theories of compression and coding ofvideo with the video source by DVI interface and the foundation of the H.263suggestion.(1)We use DVI as the data source of video and pick up numerical videoinformation by the chip of SiI1161 that is manufactured by company of SiliconImage. We give principle sketch map of DVI decoding circuit,hardware test mapand the result of actual output undee in test.(2) It is used the H.263 suggestion as the foundation to analyze realizationmethod,and put forward the suitable compression for hardware in foundation oftraditional theories. We introduce each function mold from video compression,video code, controlling of code rate, compound of code etc in detail. We use theVerilog-HDL to describe each hardware mold,and verify it by the hardware andsoftware environment of EP1C12Q240C6 FPGA machine which is manufacturedby the company of Altera.It includes:The relation between the computation precision and complexity ofDCT/IDCT and their resource requirements,a scheme for DCT/IDCTimplementation based on row-column decomposition is proposed. Theirperformance is enhanced by optimizing the data flow path;The performance and computation complexity of various kinds of motionestimation algorithms are analyzed and evaluated. A kind of method that issuitable for hardware to realize is proposed. Its computation complexity isgreatly reduced compared;Studied in variable long coding process and the relation betweencomplications of checking table and the system capability,we adopt amethod of classification to check table,so that guarantee the system in realtime,and don't consume the excessive resources of FPGA;Studied the basic principle of the controlling code rate,we adopt the dualcontrol by means of the macro view control and tiny view controls infoundation of TMN8,and attain the purpose that adapts the flux by itselfand make the code rate stable in request.(3) We use the Verilog-HDL to describe each hardware mold,and download itto the FPGA machine which is manufactured by the company of Altera forverification at last.