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Sdh Digital Cross-connect System

Posted on:2008-06-25Degree:MasterType:Thesis
Country:ChinaCandidate:X X HuaFull Text:PDF
GTID:2208360212993590Subject:Communication and Information System
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This paper mainly discuss fundamental and design method of the Synchronous Digital Hierarchy cross-connect system.With the development of the communication technology, the multimedia communication, such as vioce, data, picture and so on, becomes hotspot. The capacity of data transmission exponential increases. So it asks more request for the taking in and sending out in large quantities of communication transfer system. And it makes the SDH network more and more complex. The SDH digital cross-connect equipment, as a important part of SDH transfer system, is a multi-function transfer equipment, such as multiplexing, connection layout, protection/recovery, realtime check and control and network management. It has great effect on whole optic communication, and it becomes a important guide line of value SDH transfer capabilities. Many inside and outside manufacturers are applying themselves to the research and development of SDXC system, such as Lucent, Fujitsu.First the paper introduces the basic knowledge of SDH, including the main characteristic of SDH, the frame structure of STM-N, the multiplexing principle and equipment constitute. Then introduce SDXC briefly. Basde on this, it discusses the basic function and modules of SDH digital cross-connect system, and shows the technolgy route, design scheme of the paper and the simulation environment of the design. It' s emphases is the fundamental and design method of main modules in SDXC system.The design is based on the Verilog HDL, and Top-Down design methodology is adopted. The function simulation of the design is accomplishde with VCS of Synopsys Corp, and is synthesised by Design Compiler software. The FPGA verification of the key modules is developed in the platform of Altera FPGA device EPlC6T144C8(Cyclone series).The paper introduces systemic the SDXC, the paralleling scramble and descramble of the data, the pointer interpretation technology and the frame aligner technology. The focus is kept on the design fundamental of the time-slot control module of the SDH cross connect matrix. So it can be used more abroadly. It discusses paralleling digital correlator design method , which is based on flow line, to meet the require of SDH ASIC. And it also discusses the pointer interpretation design method, which is based on states, after analysing the pointer fundamental.
Keywords/Search Tags:SDH(Synchronous Digital Hierarchy), ASIC, Verilog HDL, SDXC(Synchronous Digital Cross-connect), Cross-connect matrix
PDF Full Text Request
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