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Local Oscillator In The Td-scdma System Design

Posted on:2007-05-28Degree:MasterType:Thesis
Country:ChinaCandidate:Y Z MiaoFull Text:PDF
GTID:2208360185991893Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
TD-SCDMA(Time Division Synchronous CDMA)is one of the main flow Air Interface Criterions of 3G Communication Technology which is presented by China. TD-SCDMA has the noticeable advantages such as high-usage frequency spectrum, support various air interfaces, excellent compatibility with 2G system, outstanding stability and the lower cost. Transceiver is the core component of the TD-SCDMA, to some extent, it plays the important role of the quality of the system. Further more, LO (Local oscillator) is one of the major parts of the transceiver, which not only could increase the frequency spectrum and frequency stability of the signal, but also can decrease the phase noise in the neighbor of the carrier frequency. How to design Frequency Synthesizer efficiently and reasonably is the main task of this article.This paper expatiates on foundational principles of the PLL-Frequency Synthesizer, analyzes the performance procedure and constitution of the PLL. In this paper, the author both builds the phase model and dynamic equation and studies the linear and noise characteristic of the PLL in detail. Via to the previous analysis, the model parameter and the property of TD-SCDMA system, the author decides to adopt the transceiver scheme: Digital IF and one order conversion in analog. Moreover, the multiple frequency points output frequency synthesizer lies on the digital PLL IC-ADF4113. In the article, the author designs the schematic diagram by Protel and realizes it on the PCB. In order to improve loop acquisition, furthermore, reject higher-order harmonic and noise in the output voltage of the PD, reduce any other stray noises and parasitic component output which is due to impurity of control voltage by VCO. During the course of design process, on one hand, comparing and analyzing among the various design schemes, on the other hand, elaborately computing and selecting the parameters of the phase locked loop. Furthermore, it is obvious that the performance of the frequency synthesizer is enhanced distinctly. In addition, there is no denying that the outstanding local oscillator makes the system performance improved sharply. Finally, the simulation results and measurements of the whole circuit are displayed in the end of the article.
Keywords/Search Tags:TD-SCDMA, PLL, VCO, Frequency Synthesizer, Loop Filter
PDF Full Text Request
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