Dsss Msk Modulation And Demodulation And Error Control Technology Research

This dissertation analyses the design idea and method for the direct spreading sequence MSK modulate system with an error control function. It gives the MATLAB simulate result and the performance analysis through the modeling process. It also discusses the code and decode theory for RS error-correcting codes, then summarizing the design and debug experience for the RS(31,15) coder and decoder through FPGA. At last, it gives the corresponding functional simulation result and timing simulation result. Chapter 1 introduces the background of this system, and its design requirement. Chapter 2 introduces the principle of the MSK modulation and demodulation system and gives the corresponding structure. After that, it discusses the principle of the band-pass technology, illuminating the feasibility of the digital intermediate frequency system based on the sampling speed which is two times lager than the signal band but unsatisfying the Nyquist theorem. After that, it discusses the capture and tailing method for the false random code spreading code, including correlation and non-correlation method. Between the two method, the correlation method is fit for the wireless communication. At last, it discusses the characteristic and theory of Costas loop and its realization structure. Chapter 3 introduces the correcting ability of the RS code. Then it particularly states the definition and algorithm of Galois field, and analyses the realization of the limited field multiplier based on the dual basis. After that it illustrates the realization arithmetic for the RS decoder. Furthermore it gives the detail time domain iterative decoding process and its flowchart. Chapter 4 makes up a modulate and demodulate system based on direct spread MSK. It theoretically proves the reasonability and feasibility of the system through analyzing the mainly modules. Furthermore, it discusses the main parameters of the receiver. At last it gives the simulation results based on MATLAB of the system. Chapter 5 gives the design illumination of the RS coder and decoder based on FPGA. Then it gives the integrated results for realization design of the RS(31,15) error-correcting code. After that, it gives the functional and layout simulation results for the limited field multiplier, divider, RS coder and RS de-coder. Finally, it summarizes the debug experience. The last chapter summarizes the dissertation and points out the further work needed to be done.