Cmos Low Noise Amplifier Design

With the development of wireless communication technology, the needs for high performance and large capability wireless communication systems are greatly enlarged, and the demand for radio frequency(RF) and communication IC become higher and higher. Thus, it brings lots of practical value to research and design RF transceiver circuit.Low noise amplifier (LNA) is a key component in the front-end of RF transceiver. As the first stage of the system, its gain, noise figure (NF) and linearity directly take effect on the whole circuit. Furthermore, in order to meet the requirement of high performance and low cost, RF transceiver needs a fully monolithic integration. In this paper, the capacitance and inductor of CMOS technology are briefly introduced firstly, and the noises of two-port network and cascade system are analyzed, the correlative formulas are shown at the same time. In the meantime, the fundamental of LNA, with some common structures as well as merits and disadvantages are given. The LNA with source inductor degeneration is analyzed in detail,which is used most widely in current. Base on the analysis, a cascode structure is presented to minimize the effect of gate-drain capacitance Cgd. Moreover, an optimized LNA structure-inter-stage inductor matching-is presented, which can achieve conjugate match of two stages, maximize the forward transmission, sequentially increase the signal noise ratio (SNR) and reduce the noise figure.Base on TSMC 0.35μm SiGe BiCMOS RF CMOS technology, a full monolithic integrated LNA with 1.5V supply voltage is presented, which work frequency is 1.5GHz. By adopting the structure of inductor as inter-stage match,its power gain increased to 17.7dB and noise figure decrease to 2.05dB.