High-speed Parallel Data Acquisition System Key Technology

In view of the necessity of digitizing signals at higher frequency, request on higher sampling rate and sampling precision has been advanced. However, due to the limitation of development of ADC, it is difficult to achieve high sampling rate and high precision simultaneously. Given that sampling rate is the most important index of data acquisition system, it is significant to research on the critical techniques concerning high-speed data acquisition system, including time-interleave technique, frequency synthesis, data transmission and storage and anti-interference technique.Aiming at the index of 1Gsps, the crucial techniques concerning high speed data acquisition system are discussed in this dissertation. And based on time interleaved technique, the implementation scheme of system is advanced and verified, and the design of hardware and software is accomplished. Moreover, the problems occurring during the design and debugging are analyzed and solved.The main tasks of this dissertation are listed below:Firstly, the basic principle of data acquisition is expounded. Different schemes to achieve high-speed DAS are proposed, and the scheme to achieve the index of lGsps by time-interleaved technique is establishedSecondly, the pivotal techniques concerning high-speed DAS are analyzed and discussed.Thirdly, based on the structure of FPGA+DSP, hardware circuits and software of system are accomplished. Also, combining with the PCB of system, problems about signal integrity in high-speed system are analyzed and discussed.Fourthly, the problems during the debugging are analyzed and summarized, some measures about the system improvement are proposed.Finally, the channel mismatches are discussed; furthermore, the test result is analyzed and calibrated.