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Multi-fpga-based Signal Detection And Realization

Posted on:2007-02-28Degree:MasterType:Thesis
Country:ChinaCandidate:W J ChenFull Text:PDF
GTID:2208360185456302Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the continuous developments of modern radar technology and anti-electronic technology, the electromagnetic environment hade become more complicated, the transmitted signal's carrier frequency had become higher, frequency band occupation had become wider, the form of the signal had become more concealment. All of above factors made it crucial to design wideband, digital, multifunctional software electronic reconnaissance equipment. Another important task is to enhance the electronic reconnaissance equipment's intercept and capture ability, accuracy, and anti-noise capability as while as reduce the response time. At present, the mismatch between the high-speed data flow of the wideband A/D converter and processing capability of the general DSP hinders the digitization of the electronic reconnaissance system most. On the other hand, the fast developments of micro-electronic technology and the wide applications of FPGA made digital circuit design more effective and afford an available method to resolve the mismatch between high-speed A/D converters and DSP chips.This paper'contributions are concentrated in several aspects as shown below: Comparing with several frequency estimation algorisms'performances on the short data condition, A fast Estimation algorism, based on DFT, is raised. The theoretical analysis, performance analysis and simulation results are also given,Bringing out the best relation between the counts of samples and the counts of frequency segments. This algorism can resolve 2 signals at the same time, and it can properly work with a lower SNR. Comparing with other traditional algorisms, the one enhanced the digital receiver's anti-noise capability and shorted the response time.To resolve the mismatch between high-speed A/D converters and DSP chips, a improvement parallel structure of DDC is put forward, which is based on poly-phase decomposition. Parallel structure of poly-phase decomposition and parallel mixer is applied in the DDC circuit, it solves the bottleneck in mixing and increases the handle speed. The partition of the tuning channel according to the digital mixing sequence, and the DDC by means of decimating first, the low-pass filtering and mixing realize efficiently the down-conversion of the variable carrier frequency band-pass signal.According to the structure of the DDC and the requirement of the frequency...
Keywords/Search Tags:Fast frequency estimation, Poly-phase decomposition, Generalized decomposition, FPGA, Digital Down-Convert, Hoping communication detection
PDF Full Text Request
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