Digital Demodulation System Design And Fpga Implementation

Digital Correlator is an important part of a wireless digital receiver. It's chiefly used for demodulation and synchronism of digital signals, sequentially recovering the original data. Digital Correlator has different realizing structure for different modulation mode and data frame. This system can act on encrypted MSK(Minimum Shift Key)signal with special pulse and frame structure . The focus of this paper is how to implement the digital IF in wireless receiver efficiently. the main research is how to demodulate MSK signal accurately effectively and realtimely. The main content includes: 1.Brief introduction and analysis of MSK signal, research its characteristic in order to demodulate efficiently. 2.Introduce and analyze the key module of demodulation technologies, for example NCO and CORDIC algorithm. 3. Research digital demodulation of MSK signal. Firstly analyze several demodulation methods, mainly quadrature demodulation and difference demodulation, and give out their advantages and disadvantages. then process simulation with software tools. 4.Realize the core parts of digital IF system in FPGA. 5.The final demodulation module pass the debugging on PCB board and apply on production. The original contributions in dissertation includes: 1.Analyze the quadrature demodulation and difference demodulation algorithm of MSK signal. for quadrature demodulation, realize NCO and obtain phase with CORDIC algorithm, it is different with traditional method. 2.The core module of digital IF is implemented in FPGA, and it can process input data in real-time with very high speed. FPGA itself has the character of reconfiguration and reprogram; thus this module that has the same characters can be applied in many other fields. 3.For the same function module, with different algorithm or different structure in...